1. Field of the Invention
The invention relates to a device control apparatus and a control method for realizing a high speed input/output access between an upper apparatus and device units such as array disk units or the like constructed by a plurality of magnetic disk units. More particularly, the invention relates to a device control apparatus and a control method for forming protection data such as a CRC or the like and adding it when user data from an upper apparatus such as a host or the like is buffered into a cache memory.
2. Description of the Related Arts
In recent years, a system for efficiently accessing array disk units by using a construction such that the array disk units constructed by a plurality of magnetic disk units are shared by a plurality of hosts through an array disk control apparatus has been realized. In such a system construction, a system in which a path change-over switch using a fiber channel interface (FC I/F), what is called a fabric is inserted between the host and the array disk control apparatus and an access is efficiently executed is realized. In the array disk control apparatus, protection data such as a CRC (Cyclic Redundancy Check code) or the like is formed on a unit basis of a block of user data which is transferred from the host, thereby protecting the user data. The protection data is formed in parallel when it is transferred to a buffer in the array disk control apparatus, the protection data is added to the end of each block data, and the resultant data is stored into the buffer.
However, under the system construction such that the fabric for path switching using the fiber channel interface is inserted between the host and the array disk control apparatus, there is a case where while the data block is being transferred from the upper apparatus to the array disk control apparatus, the transfer is interrupted due to a change-over of the switch of the fabric. To prevent such a situation, the transfer of the data block and the formation of the protection data are not simultaneously performed in the array disk control apparatus, but after the transfer of the data block from the host was finished and the data block was stored into the buffer, the protection data is formed while the block data is being read out from the buffer, the formed protection data is added to the data block, and the resultant data is again stored into the buffer. There are, consequently, problems such that it takes time to form the protection data at the time of storing user data into the buffer, a buffer area which is used in this instance also increases, and the accessing performance in case of writing the user data cannot be sufficiently raised.
According to the invention, there are provided a device control apparatus and a control method in which even if an interruption occurs in a transfer of a data block, the transfer of the data block and a formation of protection data can be simultaneously performed, thereby raising accessing performance.
According to the invention, there is provided a device control apparatus comprising: a host interface control unit for controlling a communication with an upper apparatus such as a host; a device interface control unit for controlling a communication with a device; a cache memory in which user data and a management table have been stored; a cache control unit for controlling the cache memory; and a main control unit for controlling each control unit by executing a control program stored in a main memory. According to the device control apparatus of the invention, a protection data control unit is provided for the cache control unit, the protection data is formed on a data block unit basis of the user data and written into the cache memory at the time of the writing operation for writing the user data from the upper apparatus into the cache memory. When the interruption of the transfer of the data block is detected, a forming state of the protection data at the time of interruption is stored into the cache memory. When a restart of the transfer of the data block is detected, the forming state is returned to the forming state of the protection data upon interruption stored in the cache memory and the formation of the protection data is restarted. The device control apparatus of the invention as mentioned above detects the interruption of the transfer of the data block and stores the forming state of the protection data at that time. When the restart of the transfer of the data block is detected, the state of the control unit which forms the protection data is returned to the state upon interruption of the data transfer. Thus, the transfer of the user data to the cache memory and the formation of the protection data can be executed in parallel and an interface speed between the cache control unit and the cache memory can be suppressed. Further, since there is no need to again read out the data from the buffer memory in order to form the protection data, a delay of a status report to the upper apparatus side can be avoided and the access performance can be improved.
The protection data control unit compares an OP code at the start of the transfer which is set by the control program of the main control unit with an OP code during the transfer, detects the interruption of the transfer when a difference between them is confirmed, and after the transfer interruption, compares the OP code at the time of interruption with the OP code during the interruption and detects the restart of the transfer when a difference between them is confirmed. The protection data control unit writes the data block and the formed protection data into the cache memory and stores therein when the transfer in a boundary portion of the data block is interrupted, reads out a protection data formation initial value from the cache memory, and forms protection data of the next data block when the transfer is restarted. The protection data control unit writes the protection data during the formation into the cache memory and stores therein when the transfer is interrupted in the halfway of the data block, reads out the protection data during the formation from the cache memory when the transfer is restarted, and restarts the formation of protection data corresponding to the remaining data blocks after the forming state was returned to the state upon interruption.
To manage the protection data in a protection data area and the block data in a buffer area, the cache memory of the device control apparatus of the invention has a protection data management table constructed by:
a start block address showing a start position of transfer data;
a transfer block count showing the number of blocks to be transferred;
a protection data head storage destination address to store the formed protection data;
an OP code which is set in accordance with a data transfer state such as transfer, interruption, restart, or the like; and
a seed which gives the protection data formation initial value.
In this case, at the start of the transfer, the protection data control unit sets the protection data head storage destination address in the table to address data of a cache access destination, sets the seed in the table into a seed register, and further sets the transfer block count in the table into a transfer count. Processes for increasing the address data and the transfer count after the data block and the protection data were stored into the cache memory and setting the seed in the table into the seed register are repeated each time the transfer of the data block is finished.
To manage the protection data during the formation, the cache memory has an intermediate protection data management table constructed by:
a block address showing a start position of the transfer data;
an intermediate protection data storage destination address of the cache to temporarily store intermediate protection data during the formation;
an OP code which is set in accordance with a data transfer state such as transfer, interruption, restart, or the like;
a next seed for copying a seed which is being used;
a transferred count showing the number of remaining bytes of the data block; and
an executed block count showing the number of remaining blocks to be transferred.
In this case, when the transfer is interrupted at a block boundary of the block data, the protection data control unit copies address data to access a cache protection data area to an intermediate protection data storing address in the table, copies the OP code set by a control program of the main control unit to an OP code in the table, copies a seed register to a next seed in the table, copies a transfer count to the transferred count in the table, and further copies a block count register to the executed block count. When the interrupted transfer is restarted, the protection data control unit sets the intermediate protection data storing address in the table to address data to access the cache protection data area, sets a next seed in the table into the seed register, sets the transferred block count in the table to the transfer count, and further sets the executed block count in the table to the block count register. Further, when the transfer is interrupted in the halfway of the data block, the protection data control unit copies the address data to access the cache protection data area into the intermediate protection data storing address in the table without increasing, and writes the intermediate protection data during the formation into the protection data area in the cache memory. When the interrupted transfer is restarted, the protection data control unit reads out the intermediate protection data from the cache protection data area, sets it into the intermediate seed register, and thereafter, restarts the formation of the intermediate protection data.
The device control apparatus of the invention constructs the inside of the cache memory by dividing it into: a cache management table area to store management information of data stored in the cache; a buffer area to temporarily store user data transferred from the upper apparatus via an internal bus; a protection data area to store the protection data of the user data stored in the buffer area; and a cache area to store the data transferred from the device via the internal bus. The protection data control unit forms the protection data from the data block by using the seed value, as an initial value, in the seed register which is set by the control program of the main control unit. The protection data control unit has a selector for switching the storage destination address of the user data and the storage destination address of the formed protection data when the user data is stored into the buffer area in the cache memory. While the protection data is formed from the data block read out from the cache memory at the time of the reading operation to read out and transfer the data block from the cache memory to the upper apparatus, the protection data control unit simultaneously compares the formed protection data with the protection data read out from the cache memory and transfers the formed protection data to the upper apparatus when it is legal. While the protection data is formed from the data block of the read-out user data when the data read out from the device by the device interface control unit is written into the cache area in the cache memory, the protection data control unit compares the formed protection data with the protection data added to the read-out data block and finishes the processes as being normal when it is legal. The device which is used in the device control apparatus of the invention is an array disk unit constructed by a plurality of magnetic disk units. Further, the device control apparatus of the invention relates to a system, as a target, in which a fabric which functions as a switch for path change-over using the fiber channel interface is provided between the device control apparatus and the upper apparatus.
According to the invention, there is provided a device control method of controlling input/output between an upper apparatus and a device apparatus through a cache memory, comprising the steps of:
at the time of a writing operation to write user data from the upper apparatus into the cache memory, forming protection data on a data block unit basis of the user data and writing it into the cache memory;
when an interruption of a transfer of the data block is detected, storing a forming state of the protection data at the time of interruption into the cache memory; and
when a restart of the transfer of the data block is detected, returning the forming state to the forming state of the protection data at the time of interruption stored in the cache memory and restarting the formation of the protection data. The details of the device control method is substantially the same as that in case of the construction of the device control apparatus.